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C/C++ Source or Header  |  2000-04-30  |  23KB  |  773 lines
  1. /***************************************************************************
  2.  
  3.                               -= Cave Games =-
  4.  
  5.                 driver by    Luca Elia (eliavit@unina.it)
  6.  
  7.  
  8. CPU:    MC68000
  9. Sound:    YMZ280B
  10. Other:    EEPROM
  11.  
  12. ---------------------------------------------------------------------------
  13. Game                    Year    PCB        License        Issues / Notes
  14. ---------------------------------------------------------------------------
  15. Donpachi                1995                        - Not Dumped -
  16. Dodonpachi                1997                        - Not Dumped -
  17. Dangun Feveron (Japan)    1998    CV01    Nihon System Inc.
  18. ESP Ra.De.       (Japan)    1998    ATC04    Atlus
  19. Uo Poko        (Japan)    1998    CV02    Jaleco
  20. Guwange                    1999                        - Not Dumped -
  21. ---------------------------------------------------------------------------
  22.  
  23.     - Note: press F2 to enter service mode: there are no DSWs -
  24.  
  25. To Do:
  26.  
  27. - Sound
  28. - Alignment issues between sprites and layers: see uopoko!
  29.  
  30.  
  31. ***************************************************************************/
  32. #include "driver.h"
  33. #include "vidhrdw/generic.h"
  34. #include "machine/eeprom.h"
  35.  
  36. /* Variables that vidhrdw has access to */
  37.  
  38. /* Variables defined in vidhrdw */
  39. extern unsigned char *cave_videoregs;
  40.  
  41. extern unsigned char *cave_vram_0, *cave_vctrl_0;
  42. extern unsigned char *cave_vram_1, *cave_vctrl_1;
  43. extern unsigned char *cave_vram_2, *cave_vctrl_2;
  44.  
  45. extern unsigned char *cave_soundram;
  46.  
  47. /* Functions defined in vidhrdw */
  48. WRITE_HANDLER( cave_vram_0_w );
  49. WRITE_HANDLER( cave_vram_1_w );
  50. WRITE_HANDLER( cave_vram_2_w );
  51.  
  52. WRITE_HANDLER( cave_soundram_w );
  53.  
  54. int  dfeveron_vh_start(void);
  55. int  esprade_vh_start(void);
  56. int  uopoko_vh_start(void);
  57. void dfeveron_vh_init_palette(unsigned char *palette, unsigned short *colortable,const unsigned char *color_prom);
  58. void cave_vh_screenrefresh(struct osd_bitmap *bitmap,int full_refresh);
  59.  
  60.  
  61.  
  62. /***************************************************************************
  63.  
  64.  
  65.                                 Memory Maps
  66.  
  67.  
  68. ***************************************************************************/
  69.  
  70.  
  71. static struct EEPROM_interface eeprom_interface =
  72. {
  73.     6,                // address bits
  74.     16,                // data bits
  75.     "0110",            // read command
  76.     "0101",            // write command
  77.     0,                // erase command
  78.     0,                // lock command
  79.     "0100110000"     // unlock command
  80. };
  81.  
  82. WRITE_HANDLER( cave_eeprom_w )
  83. {
  84.     if ( (data & 0xFF000000) == 0 )  // even address
  85.     {
  86.         // latch the bit
  87.         EEPROM_write_bit(data & 0x0800);
  88.  
  89.         // reset line asserted: reset.
  90.         EEPROM_set_cs_line((data & 0x0200) ? CLEAR_LINE : ASSERT_LINE );
  91.  
  92.         // clock line asserted: write latch or select next bit to read
  93.         EEPROM_set_clock_line((data & 0x0400) ? ASSERT_LINE : CLEAR_LINE );
  94.     }
  95. }
  96.  
  97. void cave_nvram_handler(void *file,int read_or_write)
  98. {
  99.     if (read_or_write)
  100.         EEPROM_save(file);
  101.     else
  102.     {
  103.         EEPROM_init(&eeprom_interface);
  104.  
  105.         if (file) EEPROM_load(file);
  106.         else usrintf_showmessage("You MUST initialize NVRAM in service mode");
  107.     }
  108. }
  109.  
  110.  
  111. READ_HANDLER( cave_inputs_r )
  112. {
  113.     switch (offset)
  114.     {
  115.         case 0:
  116.             return readinputport(0);
  117.  
  118.         case 2:
  119.             return    readinputport(1) |
  120.                     ( (EEPROM_read_bit() & 0x01) << 11 );
  121.  
  122.         default:    return 0;
  123.     }
  124. }
  125.  
  126. /*
  127.  Lines starting with an empty comment in the following MemoryReadAddress
  128.  arrays are there for debug (e.g. the game does not read from those ranges
  129.  AFAIK)
  130. */
  131.  
  132.  
  133. /***************************************************************************
  134.                                 Dangun Feveron
  135. ***************************************************************************/
  136.  
  137. static struct MemoryReadAddress dfeveron_readmem[] =
  138. {
  139.     { 0x000000, 0x0fffff, MRA_ROM                    },    // ROM
  140.     { 0x100000, 0x10ffff, MRA_BANK1                    },    // RAM
  141.     { 0x300000, 0x300003, MRA_BANK2                    },    // From sound
  142. /**/{ 0x400000, 0x407fff, MRA_BANK3                    },    // Sprites
  143. /**/{ 0x408000, 0x40ffff, MRA_BANK4                    },    // Sprites?
  144. /**/{ 0x500000, 0x507fff, MRA_BANK5                    },    // Layer 0 (size?)
  145. /**/{ 0x600000, 0x607fff, MRA_BANK6                    },    // Layer 1 (size?)
  146. /**/{ 0x708000, 0x708fff, MRA_BANK7                    },    // Palette
  147. /**/{ 0x710000, 0x710fff, MRA_BANK8                    },    // ?
  148. //    { 0x800000, 0x800079, MRA_BANK9                    },    // ?
  149. /**/{ 0x900000, 0x900005, MRA_BANK10                },    // Layer 0 Control
  150. /**/{ 0xa00000, 0xa00005, MRA_BANK11                },    // Layer 1 Control
  151.     { 0xb00000, 0xb00003, cave_inputs_r                },    // Inputs + EEPROM
  152. /**/{ 0xc00000, 0xc00001, MRA_BANK12                },    //
  153.     { -1 }
  154. };
  155.  
  156. static struct MemoryWriteAddress dfeveron_writemem[] =
  157. {
  158.     { 0x000000, 0x0fffff, MWA_ROM                                    },    // ROM
  159.     { 0x100000, 0x10ffff, MWA_BANK1                                    },    // RAM
  160.     { 0x300000, 0x300003, cave_soundram_w, &cave_soundram            },    // To Sound
  161.     { 0x400000, 0x407fff, MWA_BANK3, &spriteram, &spriteram_size    },    // Sprites
  162.     { 0x408000, 0x40ffff, MWA_BANK4                                    },    // Sprites?
  163.     { 0x500000, 0x507fff, cave_vram_0_w, &cave_vram_0                },    // Layer 0 (size?)
  164.     { 0x600000, 0x607fff, cave_vram_1_w, &cave_vram_1                },    // Layer 1 (size?)
  165.     { 0x708000, 0x708fff, paletteram_xGGGGGRRRRRBBBBB_word_w, &paletteram },    // Palette
  166.     { 0x710c00, 0x710fff, MWA_BANK8                                    },    // ?
  167.     { 0x800000, 0x800079, MWA_BANK9,  &cave_videoregs                },    // Video Regs?
  168.     { 0x900000, 0x900005, MWA_BANK10, &cave_vctrl_0                    },    // Layer 0 Control
  169.     { 0xa00000, 0xa00005, MWA_BANK11, &cave_vctrl_1                    },    // Layer 1 Control
  170.     { 0xc00000, 0xc00001, cave_eeprom_w                                },    // EEPROM
  171.     { -1 }
  172. };
  173.  
  174.  
  175.  
  176.  
  177.  
  178.  
  179.  
  180. /***************************************************************************
  181.                                     Esprade
  182. ***************************************************************************/
  183.  
  184.  
  185. static struct MemoryReadAddress esprade_readmem[] =
  186. {
  187.     { 0x000000, 0x0fffff, MRA_ROM                    },    // ROM
  188.     { 0x100000, 0x10ffff, MRA_BANK1                    },    // RAM
  189.     { 0x300000, 0x300003, MRA_BANK2                    },    // From sound
  190. /**/{ 0x400000, 0x407fff, MRA_BANK3                    },    // Sprites
  191. /**/{ 0x408000, 0x40ffff, MRA_BANK4                    },    // Sprites?
  192. /**/{ 0x500000, 0x507fff, MRA_BANK5                    },    // Layer 0 (size?)
  193. /**/{ 0x600000, 0x607fff, MRA_BANK6                    },    // Layer 1 (size?)
  194. /**/{ 0x700000, 0x707fff, MRA_BANK7                    },    // Layer 2 (size?)
  195. //    { 0x800000, 0x800079, MRA_BANK8                    },    // ?
  196. /**/{ 0x900000, 0x900005, MRA_BANK9                    },    // Layer 0 Control
  197. /**/{ 0xa00000, 0xa00005, MRA_BANK10                },    // Layer 1 Control
  198. /**/{ 0xb00000, 0xb00005, MRA_BANK11                },    // Layer 2 Control
  199. /**/{ 0xc00000, 0xc0ffff, MRA_BANK12                },    // Palette
  200.     { 0xd00000, 0xd00003, cave_inputs_r                },    // Inputs + EEPROM
  201. /**/{ 0xe00000, 0xe00001, MRA_BANK13                },    //
  202.     { -1 }
  203. };
  204.  
  205. static struct MemoryWriteAddress esprade_writemem[] =
  206. {
  207.     { 0x000000, 0x0fffff, MWA_ROM                                    },    // ROM
  208.     { 0x100000, 0x10ffff, MWA_BANK1                                    },    // RAM
  209.     { 0x300000, 0x300003, cave_soundram_w, &cave_soundram            },    // To Sound
  210.     { 0x400000, 0x407fff, MWA_BANK3, &spriteram, &spriteram_size    },    // Sprites
  211.     { 0x408000, 0x40ffff, MWA_BANK4                                    },    // Sprites?
  212.     { 0x500000, 0x507fff, cave_vram_0_w, &cave_vram_0                },    // Layer 0 (size?)
  213.     { 0x600000, 0x607fff, cave_vram_1_w, &cave_vram_1                },    // Layer 1 (size?)
  214.     { 0x700000, 0x707fff, cave_vram_2_w, &cave_vram_2                },    // Layer 2 (size?)
  215.     { 0x800000, 0x800079, MWA_BANK8,  &cave_videoregs                },    // Video Regs?
  216.     { 0x900000, 0x900005, MWA_BANK9,  &cave_vctrl_0                    },    // Layer 0 Control
  217.     { 0xa00000, 0xa00005, MWA_BANK10, &cave_vctrl_1                    },    // Layer 1 Control
  218.     { 0xb00000, 0xb00005, MWA_BANK11, &cave_vctrl_2                    },    // Layer 2 Control
  219.     { 0xc00000, 0xc0ffff, paletteram_xGGGGGRRRRRBBBBB_word_w, &paletteram },    // Palette
  220.     { 0xe00000, 0xe00001, cave_eeprom_w                                },    // EEPROM
  221.     { -1 }
  222. };
  223.  
  224.  
  225.  
  226.  
  227.  
  228. /***************************************************************************
  229.                                 Uo Poko
  230. ***************************************************************************/
  231.  
  232. static struct MemoryReadAddress uopoko_readmem[] =
  233. {
  234.     { 0x000000, 0x0fffff, MRA_ROM                    },    // ROM
  235.     { 0x100000, 0x10ffff, MRA_BANK1                    },    // RAM
  236.     { 0x300000, 0x300003, MRA_BANK2                    },    // From sound
  237. /**/{ 0x400000, 0x407fff, MRA_BANK3                    },    // Sprites
  238. /**/{ 0x408000, 0x40ffff, MRA_BANK4                    },    // Sprites?
  239. /**/{ 0x500000, 0x501fff, MRA_BANK5                    },    // Layer 0 (size?)
  240. //    { 0x600000, 0x60006f, MRA_BANK6                    },    // ?
  241. /**/{ 0x700000, 0x700005, MRA_BANK7                    },    // Layer 0 Control
  242. /**/{ 0x800000, 0x80ffff, MRA_BANK8                    },    // Palette
  243.     { 0x900000, 0x900003, cave_inputs_r                },    // Inputs + EEPROM
  244. /**/{ 0xa00000, 0xa00001, MRA_BANK9                    },    //
  245.     { -1 }
  246. };
  247.  
  248. static struct MemoryWriteAddress uopoko_writemem[] =
  249. {
  250.     { 0x000000, 0x0fffff, MWA_ROM                                    },    // ROM
  251.     { 0x100000, 0x10ffff, MWA_BANK1                                    },    // RAM
  252.     { 0x300000, 0x300003, cave_soundram_w, &cave_soundram            },    // To Sound
  253.     { 0x400000, 0x407fff, MWA_BANK3, &spriteram, &spriteram_size    },    // Sprites
  254.     { 0x408000, 0x40ffff, MWA_BANK4                                    },    // Sprites?
  255.     { 0x500000, 0x501fff, cave_vram_0_w, &cave_vram_0                },    // Layer 0 (size?)
  256.     { 0x600000, 0x60006f, MWA_BANK6,  &cave_videoregs                },    // Video Regs?
  257.     { 0x700000, 0x700005, MWA_BANK7,  &cave_vctrl_0                    },    // Layer 0 Control
  258.     { 0x800000, 0x80ffff, paletteram_xGGGGGRRRRRBBBBB_word_w, &paletteram },    // Palette
  259.     { 0xa00000, 0xa00001, cave_eeprom_w                                },    // EEPROM
  260.     { -1 }
  261. };
  262.  
  263.  
  264.  
  265.  
  266.  
  267.  
  268.  
  269.  
  270.  
  271. /***************************************************************************
  272.  
  273.  
  274.                                 Input Ports
  275.  
  276.  
  277. ***************************************************************************/
  278.  
  279. /*
  280.     dfeveron config menu:
  281.     101624.w -> 8,a6    preferences
  282.     101626.w -> c,a6    (1:coin<<4|credit) <<8 | (2:coin<<4|credit)
  283. */
  284.  
  285. INPUT_PORTS_START( dfeveron )
  286.  
  287.     PORT_START    // IN0 - $b00000
  288.     PORT_BIT(  0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP    | IPF_PLAYER1 )
  289.     PORT_BIT(  0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN     | IPF_PLAYER1 )
  290.     PORT_BIT(  0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT  | IPF_PLAYER1 )
  291.     PORT_BIT(  0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_PLAYER1 )
  292.     PORT_BIT(  0x0010, IP_ACTIVE_LOW, IPT_BUTTON1        | IPF_PLAYER1 )
  293.     PORT_BIT(  0x0020, IP_ACTIVE_LOW, IPT_BUTTON2        | IPF_PLAYER1 )
  294.     PORT_BIT(  0x0040, IP_ACTIVE_LOW, IPT_BUTTON3        | IPF_PLAYER1 )
  295.     PORT_BIT(  0x0080, IP_ACTIVE_LOW, IPT_START1  )
  296.     PORT_BIT_IMPULSE(  0x0100, IP_ACTIVE_LOW, IPT_COIN1, 1)
  297.     PORT_BITX( 0x0200, IP_ACTIVE_LOW, IPT_SERVICE, DEF_STR( Service_Mode ), KEYCODE_F2, IP_JOY_NONE )
  298.     PORT_BIT(  0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN )    // sw? exit service mode
  299.     PORT_BIT(  0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN )    // sw? enter & exit service mode
  300.     PORT_BIT(  0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN )
  301.     PORT_BIT(  0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN )
  302.     PORT_BIT(  0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN )
  303.     PORT_BIT(  0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
  304.  
  305.     PORT_START    // IN1 - $b00002
  306.     PORT_BIT(  0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP    | IPF_PLAYER2 )
  307.     PORT_BIT(  0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN     | IPF_PLAYER2 )
  308.     PORT_BIT(  0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT  | IPF_PLAYER2 )
  309.     PORT_BIT(  0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_PLAYER2 )
  310.     PORT_BIT(  0x0010, IP_ACTIVE_LOW, IPT_BUTTON1        | IPF_PLAYER2 )
  311.     PORT_BIT(  0x0020, IP_ACTIVE_LOW, IPT_BUTTON2        | IPF_PLAYER2 )
  312.     PORT_BIT(  0x0040, IP_ACTIVE_LOW, IPT_BUTTON3        | IPF_PLAYER2 )
  313.     PORT_BIT(  0x0080, IP_ACTIVE_LOW, IPT_START2  )
  314.     PORT_BIT_IMPULSE(  0x0100, IP_ACTIVE_LOW, IPT_COIN2, 1)
  315.     PORT_BIT(  0x0200, IP_ACTIVE_LOW, IPT_SERVICE1)
  316.     PORT_BIT(  0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN )
  317.     //         0x0800  eeprom bit
  318.     PORT_BIT(  0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN )
  319.     PORT_BIT(  0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN )
  320.     PORT_BIT(  0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN )
  321.     PORT_BIT(  0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
  322.  
  323. INPUT_PORTS_END
  324.  
  325.  
  326.  
  327.  
  328.  
  329.  
  330.  
  331. /***************************************************************************
  332.  
  333.  
  334.                             Graphics Layouts
  335.  
  336.  
  337. ***************************************************************************/
  338.  
  339.  
  340. /* 16x16x4 tiles */
  341. static struct GfxLayout layout_4bit =
  342. {
  343.     16,16,
  344.     RGN_FRAC(1,1),
  345.     4,
  346.     {0,1,2,3},
  347.     {0*4,1*4,2*4,3*4,4*4,5*4,6*4,7*4,
  348.      64*4,65*4,66*4,67*4,68*4,69*4,70*4,71*4},
  349.     {0*32,1*32,2*32,3*32,4*32,5*32,6*32,7*32,
  350.      16*32,17*32,18*32,19*32,20*32,21*32,22*32,23*32},
  351.     16*16*4
  352. };
  353.  
  354. /* 16x16x8 tiles */
  355. static struct GfxLayout layout_8bit =
  356. {
  357.     16,16,
  358.     RGN_FRAC(1,1),
  359.     8,
  360.     {8,9,10,11, 0,1,2,3},
  361.     {0*4,1*4,4*4,5*4,8*4,9*4,12*4,13*4,
  362.      128*4,129*4,132*4,133*4,136*4,137*4,140*4,141*4},
  363.     {0*64,1*64,2*64,3*64,4*64,5*64,6*64,7*64,
  364.      16*64,17*64,18*64,19*64,20*64,21*64,22*64,23*64},
  365.     16*16*8
  366. };
  367.  
  368.  
  369. #if 0
  370. /* 16x16x4 Zooming Sprites - No need to decode them, but if we do,
  371.    to have a look, we must remember the data has been converted from
  372.    4 bits/pixel to 1 byte per pixel, for the sprite manager */
  373.  
  374. static struct GfxLayout layout_spritemanager =
  375. {
  376.     16,16,
  377.     RGN_FRAC(1,1),
  378.     4,
  379.     {4,5,6,7},
  380.     {0*8,1*8,2*8,3*8,4*8,5*8,6*8,7*8,
  381.      8*8,9*8,10*8,11*8,12*8,13*8,14*8,15*8},
  382.     {0*128,1*128,2*128,3*128,4*128,5*128,6*128,7*128,
  383.      8*128,9*128,10*128,11*128,12*128,13*128,14*128,15*128 },
  384.     16*16*8
  385. };
  386. #endif
  387.  
  388. /***************************************************************************
  389.                                 Dangun Feveron
  390. ***************************************************************************/
  391.  
  392. static struct GfxDecodeInfo dfeveron_gfxdecodeinfo[] =
  393. {
  394.     /* There are only $800 colors here, the first half for sprites
  395.        the second half for tiles. We use $8000 virtual colors instead
  396.        for consistency with games having $8000 real colors.
  397.        A vh_init_palette function is provided as well, for sprites */
  398.  
  399.     { REGION_GFX1, 0, &layout_4bit,          0x4400, 0x40 }, // [0] Tiles
  400.     { REGION_GFX2, 0, &layout_4bit,          0x4400, 0x40 }, // [1] Tiles
  401. //    { REGION_GFX3, 0, &layout_4bit,          0x4400, 0x40 }, // [2] Tiles
  402. //    { REGION_GFX4, 0, &layout_spritemanager, 0x0000, 0x40 }, // [3] 4 Bit Sprites
  403.     { -1 }
  404. };
  405.  
  406.  
  407. /***************************************************************************
  408.                                 Esprade
  409. ***************************************************************************/
  410.  
  411. static struct GfxDecodeInfo esprade_gfxdecodeinfo[] =
  412. {
  413.     { REGION_GFX1, 0, &layout_8bit,          0x4000, 0x40 }, // [0] Tiles
  414.     { REGION_GFX2, 0, &layout_8bit,          0x4000, 0x40 }, // [1] Tiles
  415.     { REGION_GFX3, 0, &layout_8bit,          0x4000, 0x40 }, // [2] Tiles
  416. //    { REGION_GFX4, 0, &layout_spritemanager, 0x0000, 0x40 }, // [3] 8 Bit Sprites
  417.     { -1 }
  418. };
  419.  
  420.  
  421.  
  422. /***************************************************************************
  423.                                 Uo Poko
  424. ***************************************************************************/
  425.  
  426. static struct GfxDecodeInfo uopoko_gfxdecodeinfo[] =
  427. {
  428.     { REGION_GFX1, 0, &layout_8bit,          0x4000, 0x40 }, // [0] Tiles
  429. //    { REGION_GFX4, 0, &layout_spritemanager, 0x0000, 0x40 }, // [1] 8 Bit Sprites
  430.     { -1 }
  431. };
  432.  
  433.  
  434.  
  435.  
  436. /***************************************************************************
  437.  
  438.  
  439.                                 Machine Drivers
  440.  
  441.  
  442. ***************************************************************************/
  443.  
  444. #define cave_INTERRUPT_NUM 1
  445. int cave_interrupt(void)
  446. {
  447.     switch (cpu_getiloops())
  448.     {
  449.         case 0:        return 1;
  450.         default:    return ignore_interrupt();
  451.     }
  452. }
  453.  
  454.  
  455.  
  456.  
  457.  
  458. /***************************************************************************
  459.                                 Dangun Feveron
  460. ***************************************************************************/
  461.  
  462. static struct MachineDriver machine_driver_dfeveron =
  463. {
  464.     {
  465.         {
  466.             CPU_M68000,
  467.             16000000,
  468.             dfeveron_readmem, dfeveron_writemem,0,0,
  469.             cave_interrupt, cave_INTERRUPT_NUM
  470.         },
  471.     },
  472.     60,DEFAULT_60HZ_VBLANK_DURATION,
  473.     1,
  474.     0,
  475.  
  476.     /* video hardware */
  477.     320, 240, { 0, 320-1, 0, 240-1 },
  478.     dfeveron_gfxdecodeinfo,
  479.     0x800, 0x8000,    /* $8000 palette entries for consistency with the other games */
  480.     dfeveron_vh_init_palette,
  481.     VIDEO_TYPE_RASTER | VIDEO_MODIFIES_PALETTE,
  482.     0,
  483.     dfeveron_vh_start,
  484.     0,
  485.     cave_vh_screenrefresh,
  486.  
  487.     /* sound hardware */
  488.     0,0,0,0,
  489.     {
  490.         {0}
  491.     },
  492.  
  493.     cave_nvram_handler
  494. };
  495.  
  496.  
  497.  
  498.  
  499.  
  500. /***************************************************************************
  501.                                 Esprade
  502. ***************************************************************************/
  503.  
  504.  
  505. static struct MachineDriver machine_driver_esprade =
  506. {
  507.     {
  508.         {
  509.             CPU_M68000,
  510.             16000000,
  511.             esprade_readmem, esprade_writemem,0,0,
  512.             cave_interrupt, cave_INTERRUPT_NUM
  513.         },
  514.     },
  515.     60,DEFAULT_60HZ_VBLANK_DURATION,
  516.     1,
  517.     0,
  518.  
  519.     /* video hardware */
  520.     320, 240, { 0, 320-1, 0, 240-1 },
  521.     esprade_gfxdecodeinfo,
  522.     0x8000, 0x8000,
  523.     0,
  524.     VIDEO_TYPE_RASTER | VIDEO_MODIFIES_PALETTE,
  525.     0,
  526.     esprade_vh_start,
  527.     0,
  528.     cave_vh_screenrefresh,
  529.  
  530.     /* sound hardware */
  531.     0,0,0,0,
  532.     {
  533.         {0}
  534.     },
  535.  
  536.     cave_nvram_handler
  537. };
  538.  
  539.  
  540.  
  541. /***************************************************************************
  542.                                 Uo Poko
  543. ***************************************************************************/
  544.  
  545. static struct MachineDriver machine_driver_uopoko =
  546. {
  547.     {
  548.         {
  549.             CPU_M68000,
  550.             16000000,
  551.             uopoko_readmem, uopoko_writemem,0,0,
  552.             cave_interrupt, cave_INTERRUPT_NUM
  553.         },
  554.     },
  555.     60,DEFAULT_60HZ_VBLANK_DURATION,
  556.     1,
  557.     0,
  558.  
  559.     /* video hardware */
  560.     320, 240, { 0, 320-1, 0, 240-1 },
  561.     uopoko_gfxdecodeinfo,
  562.     0x8000, 0x8000,
  563.     0,
  564.     VIDEO_TYPE_RASTER | VIDEO_MODIFIES_PALETTE,
  565.     0,
  566.     uopoko_vh_start,
  567.     0,
  568.     cave_vh_screenrefresh,
  569.  
  570.     /* sound hardware */
  571.     0,0,0,0,
  572.     {
  573.         {0}
  574.     },
  575.  
  576.     cave_nvram_handler
  577. };
  578.  
  579.  
  580.  
  581.  
  582.  
  583. /***************************************************************************
  584.  
  585.  
  586.                                 ROMs Loading
  587.  
  588.  
  589. ***************************************************************************/
  590.  
  591. /* 4 bits -> 8 bits */
  592. static void unpack_sprites(void)
  593. {
  594.     const int region        =    REGION_GFX4;    // sprites
  595.  
  596.     const unsigned int len    =    memory_region_length(region);
  597.     unsigned char *src        =    memory_region(region) + len / 2 - 1;
  598.     unsigned char *dst        =    memory_region(region) + len - 1;
  599.  
  600.     while(dst > src)
  601.     {
  602.         unsigned char data = *src--;
  603.         /* swap even and odd pixels */
  604.         *dst-- = data >> 4;        *dst-- = data & 0xF;
  605.     }
  606. }
  607.  
  608.  
  609. /* 2 pages of 4 bits -> 8 bits */
  610. static void esprade_unpack_sprites(void)
  611. {
  612.     const int region        =    REGION_GFX4;    // sprites
  613.  
  614.     unsigned char *src        =    memory_region(region);
  615.     unsigned char *dst        =    memory_region(region) + memory_region_length(region);
  616.  
  617.     while(src < dst)
  618.     {
  619.         unsigned char data1 = src[0];
  620.         unsigned char data2 = src[1];
  621.  
  622.         src[0] = (data1 & 0xf0) + (data2 & 0x0f);
  623.         src[1] = ((data1 & 0x0f)<<4) + ((data2 & 0xf0)>>4);
  624.  
  625.         src += 2;
  626.     }
  627. }
  628.  
  629.  
  630.  
  631.  
  632. /***************************************************************************
  633.  
  634.                                 Dangun Feveron
  635.  
  636. Board:    CV01
  637. OSC:    28.0, 16.0, 16.9 MHz
  638.  
  639.  
  640. ***************************************************************************/
  641.  
  642. ROM_START( dfeveron )
  643.  
  644.     ROM_REGION( 0x100000, REGION_CPU1 )        /* 68000 Code */
  645.     ROM_LOAD_EVEN( "cv01-u34.bin", 0x000000, 0x080000, 0xbe87f19d )
  646.     ROM_LOAD_ODD ( "cv01-u33.bin", 0x000000, 0x080000, 0xe53a7db3 )
  647.  
  648.     ROM_REGION( 0x200000, REGION_GFX1 | REGIONFLAG_DISPOSE )    /* Layer 1 */
  649.     ROM_LOAD( "cv01-u50.bin", 0x000000, 0x200000, 0x7a344417 )
  650.  
  651.     ROM_REGION( 0x200000, REGION_GFX2 | REGIONFLAG_DISPOSE )    /* Layer 2 */
  652.     ROM_LOAD( "cv01-u49.bin", 0x000000, 0x200000, 0xd21cdda7 )
  653.  
  654. //    ROM_REGION( 0x200000, REGION_GFX3 | REGIONFLAG_DISPOSE )    /* Layer 3 */
  655. //    empty
  656.  
  657.     ROM_REGION( 0x800000 * 2, REGION_GFX4 )        /* Sprites: * 2 , do not dispose */
  658.     ROM_LOAD( "cv01-u25.bin", 0x000000, 0x400000, 0xa6f6a95d )
  659.     ROM_LOAD( "cv01-u26.bin", 0x400000, 0x400000, 0x32edb62a )
  660.  
  661.     ROM_REGION( 0x400000, REGION_SOUND1 )    /* Samples */
  662.     ROM_LOAD( "cv01-u19.bin", 0x000000, 0x400000, 0x5f5514da )
  663.  
  664. ROM_END
  665.  
  666.  
  667. void init_dfeveron(void)
  668. {
  669.     unpack_sprites();
  670. }
  671.  
  672.  
  673.  
  674.  
  675. /***************************************************************************
  676.  
  677.                                     Esprade
  678.  
  679. ATC04
  680. OSC:    28.0, 16.0, 16.9 MHz
  681.  
  682. ***************************************************************************/
  683.  
  684.  
  685. ROM_START( esprade )
  686.  
  687.     ROM_REGION( 0x100000, REGION_CPU1 )        /* 68000 Code */
  688.     ROM_LOAD_EVEN( "u42.bin", 0x000000, 0x080000, 0x0718c7e5 )
  689.     ROM_LOAD_ODD ( "u41.bin", 0x000000, 0x080000, 0xdef30539 )
  690.  
  691.     ROM_REGION( 0x800000, REGION_GFX1 | REGIONFLAG_DISPOSE )    /* Layer 1 */
  692.     ROM_LOAD( "u54.bin", 0x000000, 0x400000, 0xe7ca6936 )
  693.     ROM_LOAD( "u55.bin", 0x400000, 0x400000, 0xf53bd94f )
  694.  
  695.     ROM_REGION( 0x800000, REGION_GFX2 | REGIONFLAG_DISPOSE )    /* Layer 2 */
  696.     ROM_LOAD( "u52.bin", 0x000000, 0x400000, 0xe7abe7b4 )
  697.     ROM_LOAD( "u53.bin", 0x400000, 0x400000, 0x51a0f391 )
  698.  
  699.     ROM_REGION( 0x400000, REGION_GFX3 | REGIONFLAG_DISPOSE )    /* Layer 3 */
  700.     ROM_LOAD( "u51.bin", 0x000000, 0x400000, 0x0b9b875c )
  701.  
  702.     ROM_REGION( 0x1000000, REGION_GFX4 )        /* Sprites (do not dispose) */
  703.     ROM_LOAD_GFX_EVEN( "u63.bin", 0x000000, 0x400000, 0x2f2fe92c )
  704.     ROM_LOAD_GFX_ODD ( "u64.bin", 0x000000, 0x400000, 0x491a3da4 )
  705.     ROM_LOAD_GFX_EVEN( "u65.bin", 0x800000, 0x400000, 0x06563efe )
  706.     ROM_LOAD_GFX_ODD ( "u66.bin", 0x800000, 0x400000, 0x7bbe4cfc )
  707.  
  708.     ROM_REGION( 0x400000, REGION_SOUND1 )    /* Samples */
  709.     ROM_LOAD( "u19.bin", 0x000000, 0x400000, 0xf54b1cab )
  710.  
  711. ROM_END
  712.  
  713.  
  714. void init_esprade(void)
  715. {
  716.     esprade_unpack_sprites();
  717. }
  718.  
  719.  
  720.  
  721.  
  722. /***************************************************************************
  723.  
  724.                                     Uo Poko
  725. Board: CV02
  726. OSC:    28.0, 16.0, 16.9 MHz
  727.  
  728. ***************************************************************************/
  729.  
  730. ROM_START( uopoko )
  731.  
  732.     ROM_REGION( 0x100000, REGION_CPU1 )        /* 68000 Code */
  733.     ROM_LOAD_EVEN( "u26j.bin", 0x000000, 0x080000, 0xe7eec050 )
  734.     ROM_LOAD_ODD ( "u25j.bin", 0x000000, 0x080000, 0x68cb6211 )
  735.  
  736.     ROM_REGION( 0x400000, REGION_GFX1 | REGIONFLAG_DISPOSE )    /* Layer 1 */
  737.     ROM_LOAD( "u49.bin", 0x000000, 0x400000, 0x12fb11bb )
  738.  
  739. //    ROM_REGION( 0x200000, REGION_GFX2 | REGIONFLAG_DISPOSE )    /* Layer 2 */
  740. //    empty
  741.  
  742. //    ROM_REGION( 0x200000, REGION_GFX3 | REGIONFLAG_DISPOSE )    /* Layer 3 */
  743. //    empty
  744.  
  745.     ROM_REGION( 0x400000 * 2, REGION_GFX4 )        /* Sprites: * 2 , do not dispose */
  746.     ROM_LOAD( "u33.bin", 0x000000, 0x400000, 0x5d142ad2 )
  747.  
  748.     ROM_REGION( 0x400000, REGION_SOUND1 )    /* Samples */
  749.     ROM_LOAD( "u4.bin", 0x000000, 0x200000, 0xa2d0d755 )
  750.  
  751. ROM_END
  752.  
  753.  
  754. void init_uopoko(void)
  755. {
  756.     unpack_sprites();
  757. }
  758.  
  759.  
  760.  
  761.  
  762. /***************************************************************************
  763.  
  764.  
  765.                                 Game Drivers
  766.  
  767.  
  768. ***************************************************************************/
  769.  
  770. GAMEX( 1998, dfeveron, 0, dfeveron, dfeveron, dfeveron, ROT270_16BIT, "Cave (Nihon System license)", "Dangun Feveron (Japan)", GAME_NO_SOUND )
  771. GAMEX( 1998, esprade,  0, esprade,  dfeveron, esprade,  ROT270_16BIT, "Atlus/Cave", "ESP Ra.De. (Japan)", GAME_NO_SOUND )
  772. GAMEX( 1998, uopoko,   0, uopoko,   dfeveron, uopoko,   ROT0_16BIT,   "Cave (Jaleco license)", "Uo Poko (Japan)", GAME_NO_SOUND )
  773.